Tentalabbet

TSEK06 · 12 credits · Advanced level (A1F) · Elektroteknik

VLSI Design

Discontinued · replaced by TSEK09

100%

passed the latest regular sitting

PRA1 · 18 Jun 2026 · 13 students

100%

passed the regular sittings, all sittings over the last 5 years

PRA1 · 107 students

This module only reports passing results, so the pass rate does not show how many did not pass.

Part of 4 programmes

Hand-in or lab

PRA1 Project Work

  • G

Main rounds

100% passed · 107 students

  • 100%13
  • 100%38
  • 100%20
  • 100%19
  • 100%17

Later rounds

100% passed · 7 students

  • 100%7
  • Pass a later round: 100% (7 students), compared with 100% (107 students) on the ordinary exam
Show small sittings (1)

Sittings with fewer than 5 students, often credit transfers or special sittings. They are not part of any figure on this page.

  • 100%1

Other modules

Partial exams, hand-ins and labs. They are not part of the figures at the top.

Hand-in or lab

LAB1 Laboratory Work

  • G

Main rounds

100% passed · 112 students

  • 100%20
  • 100%36
  • 100%20
  • 100%19
  • 100%17

Later rounds

No sittings with at least 5 students.

    Show small sittings (1)

    Sittings with fewer than 5 students, often credit transfers or special sittings. They are not part of any figure on this page.

    • 100%2

    Hand-in or lab

    UPG1 Entrepreneurship Assignments

    • G

    Main rounds

    100% passed · 112 students

    • 100%18
    • 100%38
    • 100%20
    • 100%19
    • 100%17

    Later rounds

    No sittings with at least 5 students.

      Show small sittings (1)

      Sittings with fewer than 5 students, often credit transfers or special sittings. They are not part of any figure on this page.

      • 100%2

      About the course

      Aim

      This course is intended to give knowledge and experience in design and fabrication of CMOS VLSI chips. This includes:

      • Deep insight in design of VLSI chips.
      • Knowledge and experience of using professional CAD tools for design, simulation, layout, and verification of VLSI chips.
      • Design of a chip from an idea to layout and final verifications.
      • Complete the project using a systematic and professional approach required by industry to run large and complex VLSI projects:Organize a project group, make project plan, and divide the task efficiently among the group members.Promote teamwork, create a dynamic and functional group, and actively monitor the progress of the project.Apply the knowledge from previous courses, search for supplementary knowledge and material, take the initiative, and find creative solutions.Meet the project milestones and the final deadline, document the project, and show the progress by written reports and oral presentations.

      A purpose for the course is also for the students to acquire knowledge and abilities within the general area of entrepreneurship, with particular focus on business planning for new ventures. After the course, students should be able to:

      • account for models that describe what it takes for a new venture to have a stable basis for further development and to asess the level of development of ventures using such models; and
      • account for the information and analyses needed to evaluate a development project from a business point of view and have the ability to collect and analyse relevant information for the purpose.

      Content

      Labs include: a small project-example intending to demonstrate a full custom (handwork) and an automated VLSI design flow as well as introducing major tools to be used throughout the design projects.

      We provide projects both in transistor level and hardware description and synthesis. The projects may vary between years. Examples of previous projects include ADC, DAC, high speed communication links, ALU’s, parts of a CPU and timer circuits.

      Design project includes: Team building, project planning, project management, pre-study of the project, architectural exploration, behavioral modeling and verifications, logic/transistor-level design. In purely digital projects, this corresponds to place-and-route, by which is meant automated gate level layout based on existing standard cell libraries. Finally, for all projects, circuit simulations, circuit layout, layout verifications, tape out (prepare the database for manufacture), and the final project documentation are included.

      Lectures support the project moments including: Course description, introduction to VLSI design methodology, project description, advanced circuit and layout techniques, interconnect interface circuits, on-chip power delivery, clock distribution, synchronization techniques, IO drivers, and pads, testability and reliability considerations, and other related topics.

      Examiner
      Alireza Saberkari
      Scheduled hours
      60 h
      Main field of study
      Elektroteknik
      Syllabus on Studieinfo ↗